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Single 2 Input OR Gate, 5 Pins, TSSOP - 74LVC1G32GW,125
Single 2 Input OR Gate, 5 Pins, TSSOP - 74LVC1G32GW,125
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The 74LVC1G32GW is a single 2-input OR Gate, inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Features
- High noise immunity
- Complies with JEDEC standard - JESD8-7, JESD8-5 and JESD8-B/JESD36
- ESD protection - HBM JESD22-A114F exceeds 2000V, MM JESD22-A115-A exceeds 200V
- ±24mA Output drive (VCC = 3V)
- CMOS low power consumption
- Latch-up performance exceeds 250mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5V
| Specifications | |
|---|---|
| Logic Function | OR Gate |
| No. of Elements | Single |
| No. of Inputs | 2Inputs |
| No. of Pins | 5Pins |
| Logic Case Style | SOT-353 |
| Product Range | 74LVC1G32 |
| Logic IC Family | 74LVC |
| Supply Voltage Min | 1.65V |
| Supply Voltage Max | 5.5V |
| Schmitt Trigger Input | Without Schmitt Trigger Input |
| Operating Temperature Min | -40°C |
| Operating Temperature Max | 125°C |
| Important Product Warning: | Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts. |
| Country of Origin: | Malaysia |
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