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DDR Termination Regulator, DDR, DDR2, DDR3, DDR3L, 2.5V Rail / 3.5V Input, 5.5A Sink, VSON-10 - TPS51200DRCT
DDR Termination Regulator, DDR, DDR2, DDR3, DDR3L, 2.5V Rail / 3.5V Input, 5.5A Sink, VSON-10 - TPS51200DRCT
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The TPS51200DRCT is a sink/source Double Data Rate (DDR) Termination Regulator, specifically designed for low input voltage, low-noise systems where space is a key consideration. The TPS51200DRCT maintains a fast transient response and only requires a minimum output capacitance of 20μF. The TPS51200DRCT supports a remote sensing function and all power requirements for DDR, DDR2, DDR3 and low power DDR3/DDR4 VTT bus termination. In addition, the TPS51200DRCT provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
Features
- 1.1 to 3.5V VLDOIN Voltage range
- Sink/source termination regulator includes droop compensation
- Requires minimum output capacitance of 20μF (typically 3 x 10μF MLCCs)
- PGOOD to monitor output regulation
- EN Input
- REFIN Input allows for flexible input tracking either directly or through resistor divider
- Remote sensing (VOSNS)
- ±10mA Buffered reference (REFOUT)
- Built-in soft start, UVLO and OCL
- Thermal shutdown
- Meets DDR, DDR2 JEDEC specifications, supports DDR3 and low-power DDR3/DDR4 VTT applications
| Specifications | |
|---|---|
| Memory Supported | DDR1, DDR2, DDR3, LPDDR3, DDR4, LPDDR4 |
| Source / Sink Current | 3A |
| Supply Voltage Min | 2.375V |
| Supply Voltage Max | 3.5V |
| DDR Regulator Case Style | VSON |
| IC Case / Package | VSON |
| No. of Pins | 10Pins |
| Operating Temperature Min | -40°C |
| Operating Temperature Max | 85°C |
| Country of Origin: | China |
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